1. Technical Field of the Invention
The present invention relates to a device and method for accessing a semiconductor memory device, and particularly to a method for reading and writing a full page of data into a random access memory (RAM) device in a single memory cycle.
2. Background of the Invention
Conventional dynamic random access memory (DRAM) devices employ a single transistor architecture wherein the memory cell comprises a storage capacitor having a first terminal connected to a reference voltage and a second terminal connected to a pass gate transistor. The core of the DRAM is typically partitioned into arrays or blocks of memory cells, with each array including a plurality of rows of memory cells, wherein the memory cells in each row are connected to a respective one of a plurality of word lines. Memory cells in each column of cells in a memory array are connected to a respective one of a plurality of bit lines.
Existing DRAM devices typically utilize column decode circuitry so that only a relatively small block of data, such as a byte or word of data, is read from and written into a DRAM array during a single memory cycle. Reading or writing a relatively large block of data, such as a page of data, to a DRAM device in this fashion, however, is inefficient and even prohibitive for certain higher speed applications. Consequently, there is a need to more efficiently access DRAM devices with relatively large blocks of data.